Recently, as information technology (IT) equipments require high capacity, demands for high-capacity semiconductor packages, such as a NAND flash memory, are increasing. However, during a process of stacking a plurality of semiconductor chips on both surfaces of a substrate, the process becomes complicated and a yield is decreased. In other words, if any one of the plurality of semiconductor chips has a defect, the entire semiconductor package is discarded and it is difficult to perform a rework process, thereby resulting in an increase in manufacturing costs.